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THE INTEL 80286 MICROPROCESSOR INTRODUCTION We have used the 8088/8086 microprocessor, because it is the simplest member of this family of Intel processors and is therefore for a good starting point. now it the time to looking at the evolutionary offspring of 8086 . to give you an overview, here are a few brief notes about the members of the family. the 80286 , another 16-bit enhancement of the 8086 we introduced as the same time as the 80186 instead of the integrated peripherals of the 80186, it has virtual memory management circuitry, production circuitry, and a 16MB addressing capability. the 80286 was the first family member designed specifically for use as the CPU in the multi-user microcomputer. MULTIUSER/MULTITASKING OPERATING SYSTEM CONCEPTS The basic principle of a timeshare system is that the CPU runs one user's program for a few milliseconds, that runs the next users program for a few milliseconds, and so on until if the user have had to turn. it cycles through the users over and over, fast enough that each users seem to have the complete attention of the CPU . an operating system which coordinates the action of the intersystem such as this is referred to as a multi-user operating system. the program or section of a program of each user is revered to as a task or process, so a multi-user operating system’s also commonly referred to as multitasking . multitasking operating system are also used to control the operating system of the machine in industrial manufacturing environments. networking is an example of the multitasking/multi-user operating system . SCHEDULING TSR PROGRAMS AND DOS MS Dos is designed as a single user, single-tasking operating system. this means that dos can usually execute only one program at the time . the only exception to this in the basic this dos in the print program. print.com you may have noticed that when you execute the print command , dos returned a prompt and allow you to enter another command before the printing is complete . the print program starts printing the specified file and the returned execution to dos. however, the print program continue to monitor dos execution when dos is sitting in a loop sitting in a loop waiting for a user command or some other event , the print program borrows the CPU for a short time and sends more data to the printer. if then return execution to the interrupted dos loop . The dos print command then is a limited form of multitasking. products sunk as Orlando’s sidekick use this same technique in dos system to provide popup menus of useful function such as a calculator. the first time you run in a such as sidekick. it is loaded into memory as other programs are. however , unlike other programs sidekick is designed so that when you terminate the program. it says "resident" in memory . you can executed the program and popup the menu again by a simply pressing some hot key combination such as Ctrl+Alt program which work in this way are called terminate and-stay-resident or TSR programs , because TSRs are so common in the PC world , we through you might find it interesting to see hoe they work before we get into discussions of the scheduling technique used in full fledged multitasking operating system. When you boot up dos, the basic 640 KB of ram are set up as shown in figure a starting from absolute address 00000 , the first section of the ram is reserved for interrupt vector . the main part of the dos program is loaded into the next -higher section of ram . After this come device drivers such as ANSI.SYS,MOUSE.SYS etc the dos command processor program , command.com , gets loaded into RAM at boot time. this program , with processes user command and executes programs , has two parts . the resident part the command processor is loaded in memory just above the device drivers and the transient part is loaded in at the very top of RAM . when you tell DOS to execute a exeprogram, the program will be loaded into the transient program area of RAM and , if necessary into the RAM where the transient part of the command processor was loaded . (the transient part of the command processor will be reloaded when the program terminate ). Normally ,when a program terminates all the transient program area is dealocated , so that another program can be loaded in it to be run . TSR program , however, are terminated in a special way so that they are left resident in memory as shown in figure b . the terminated program . when another program is loaded to be run , it is put in RAM above the TSRs. The need of a multitasking multi-user operating system include environment preservation during task switches , operating system and user protection, and virtual memory management. The Intel 80286 was the first 8086 family processor designed to make the implementation of these features relatively closer. 80286 ARCHITECTURE, SIGNALS AND SYSTEM CONNECTIONS BUS UNIT The bus unit ( BU) in the device performs all necessary memory and I/O reads and writes, prefects instruction bytes, and controls transfer of data to and from the microprocessor extension devices such as 80287 math coprocessor. INSTRUCTION UNIT The instruction Unit(IU) fully decodes up to three perfected instructions and holds them in a queue, where the execution unit can access them. This is a further example of how modern processors keeps several instructions ‘in the pipeline’ instead of waiting to finish one instruction before fetching the next. EXECUTION UNIT The execution unit(EU) uses its 16-bit ALU to execute instructions it receives from the instruction unit. When operating in its real address mode, the 80286 register set is the same as that of an 8086 except for the addition of a 16-bit machine status word (MSW) register. ADDRESS UNIT The address unit (AU) computes the physical address what will be sent out to memory or I/O by the BU. The 80286 can operate in one of two memory address modes, real address or protected virtual address mode. If the 80286 is operating in the real address mode, the address unit computes addresses using a segment base and an offset just as the 80286 does. The familiar CS,DS,SS and ES registers are used to hold the base addresses for the segment currently in use. The maximum physical address space in this mode is 1MB, just as 8086. If an 80286 is operating in its protected virtual address mode(protected mode), the address unit functions as a complete MMU. In this address mode the 80286 uses all the 24 address lines to access up to 16 MB of physical memory. In protected mode it also provides up to a gigabyte of virtual memory. 80286 SIGNALS AND SYSTEM CONNECTIONS The 80286 has a 16-bit data bus and a 24-bit no multiplexed address bus. The 24 bit address bus allows the processor to access 16 MB of physical memory when operating in the protected mode. Memory hardware for the 80286 is set up as an odd bank and an even bank, just as in the 8086.The even bank will be enabled when AO is low, and the odd bank will be enabled when BHE will be Low. External buffers are used in both the address and data bus. From a control standpoint, the 80286 functions similarly to an 8086 operating in maximum mode. Status signals SO, SI and M/IO are decoded by an external 82288 bus controller to produce the control bus, read, write and interrupt-acknowledge signals. The HOLD, HLDA, INTR, INTA, (NMI), READY, LOCK and RESET pins functions basically the same as they do in 8086. An external 82284 clock generator is used to produce a clock signal for the 80286 and to synchronize RESET and READY signals. The final four signal pins are used to interface with processor Extensions(coprocessors) such as the 80287 math coprocessor. The processor extension request (PEREQ) input pin will be asserted by a coprocessor to tell the 80286 to perform a data transfer to or from memory for it. When the 80286 gets around to do the transfer, it asserts the process extension acknowledge (PEACK) signal to the coprocessor to let it know the data transfer has started. Data transfers are done through the 80286 in this way so that the coprocessor uses the protection and virtual memory capability of the MMU in the 80286. The BUSY signal input does on the 80286 functions the same as the TEST input does on the 8086. When the 80286 executes a WAIT instruction , it will remain in a WAIT loop until it finds the BUSY signal from the coprocessor high. If a coprocessor finds some error during processing, it will assert the ERROR input of the 80286. This will cause the 80286 automatically da a type 16H interrupt call. 80286 REAL ADDRESS MODE OPERATIONS After 80286 is reset, it starts executing in its real address mode. This mode is referred to as real because physical memory addresses are produced by directly adding an offset to a segment base. In this mode, the 80286 can address 1MB of physical address and functions essentially as a "souped-up" 8086.When operating in real address mode, the interrupt vector table of the 80286 is located in the first 1KB of memory and the response to an interrupt is same as 8086.The 80286 has several additional built in interrupt types. The 80186 and the later processors separate interrupts in two categories, interrupts and exceptions. Asynchronous external events which affect the processor through the INRT and NMI inputs are referred to as interrupts. An exception type interrupt is generated by some error condition that occurred during the execution of an instruction. Software interrupts are produced by the INT n instruction are classified as exceptions, because they are synchronous with the processor. Exceptions are further divided into faults and traps. Faults are exceptions that are Exceptions that detected and signaled before the faulting instructions is executed. Traps are exceptions which are reported after the instruction which caused the exception executes. 80286 PROTECTED –MODE OPERATION On an 80286 based system running under MSDOS or a similar OS, the 80286 is left in real address mode because current versions of DOS are not designed to take advantage of the protected mode features of 80286. If an 80286 based system is running OS such as Microsoft OS/2, which uses the protected mode, the real mode will be used to initialize peripheral devices, load the main part of the OS into the memory from the disk, load some registers , enable interrupts set up descriptor tables and switch the processor to the protected mode.The first step is switching to the protected mode is to set the protection enable bit in the machine status word (MSW) register in the 80286.Bits 1,2 and 3 of the MSW are for the most part to indicate whether a processor extension (coprocessor) is present in the system or not. Bit 0 of the MSW is used to switch the 80286 into protected mode. To change bits in the MSW you load the desired word in a register or memory location and execute the load machine status word(LMSW) instruction .The initial step to get the 80286 operating in protected mode is to execute an intersegment jump to the start of the main system program. ADDITIONAL INSTRUCTIONS The 80286 has even more instructions than its predecessors. These extra instructions Control the virtual memory system through manager of the 80286.These instructions are as followsINSTRUCTIONS PURPOSE CLTS Clears the task-switched flag bit LDGT Loads the global descriptor table register SGDT Stores the global descriptor table register LIDT Loads the interrupt descriptor table register SIDT Stores the interrupt descriptor table register LLDT Loads the local descriptor table register SLDT Stores the interrupt descriptor table register LMSW Loads the machine status word SMSW Stores the machine status word LAR Loads the access rights LSL Loads the segment limit SAR Stores the access rights ARPL Adjusts the requested privilege level VERR Verifies a read access VERW Verifies a write access From a software standpoint the 80286 was designed to be upward compatible from the 8086 so that the huge amount of software developed for the 8086/8088 could be easily transported to the 80286.The instruction set of the 80286 and later processors are "supersets" of the 8086 instructions. The new and enhanced instructions in the 80286 instructions is as follows Real or protected mode instructions INS Input String OUTS Output String PUSHA Push eight general –purpose registers on the stack. POPA Pop eight general –purpose registers on the stack. PUSH immediate Push immediate number on stack SHIFT/ROTATE destination, immediate Shift or rotate destination register or memory location specified number of bit positions. IMUL destination, immediate Signed multiply destination by immediate number. IMUL destination, multiplicand, immediate Signed multiply, result in specified Multiplier destination. ENTER Set up stack in procedure.Saves BP, points BP to TOS and allocates stack space for local variables. THE VIRTUAL MEMORY MACHINE A virtual memory machine is a machine that maps a larger memory space(1 G byte for the 80286) into a much smaller physical memory space(16M bytes for 80286). This allows a very large system to execute in smaller physical memory systems. This is accomplished by spooling the data and programs between the fixed disk memory system & the physical memory. Addressing a 1G-byte memory system is accomplished by the description in the 80286 microprocessor. Each 80286 description describes a 64 k-byte memory segment and the 80286 allows 16k descriptions. This (64k x 16k) allows a maximum of 1G byte of memory to be addressed by the system. |